P1 has the lock for most of the time, but P1's cache only contains a valid copy of the cache line for a little bit because a processor doesn't have to have the line in the cache for it to have the lock. Only 1 thread can have the lock, but the cache line can be bouncing around between caches.
P1 has the lock for most of the time, but P1's cache only contains a valid copy of the cache line for a little bit because a processor doesn't have to have the line in the cache for it to have the lock. Only 1 thread can have the lock, but the cache line can be bouncing around between caches.