The four core CPU shown in this slide uses all the three concepts discussed till here in the lecture. Each of the four cores("multi-core") is "superscalar" with maximum "ILP" of 3 since they have 3 fetch/decode units. They support 8-wide SIMD instructions with the help of sets of 8 ALUs.
The four core CPU shown in this slide uses all the three concepts discussed till here in the lecture. Each of the four cores("multi-core") is "superscalar" with maximum "ILP" of 3 since they have 3 fetch/decode units. They support 8-wide SIMD instructions with the help of sets of 8 ALUs.