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mcu

How does a system like this handle situations where the same chunk of memory is requested by different cores at the same time (and one or more cores are trying to write it)? I know that there are issues that arise out of this (I think false sharing is an example of this?) but I'm curious what kind of mechanisms the interconnect & memory controller actually use to decide what the value at a location in memory actually is at a given time.

timothy

Just spotted this paper: https://arxiv.org/abs/2103.03443, which covers security vulnerabilities of this interconnect. Basically one can infer details about a program based off contention on this ring. The fact they can even do this is genuinely very impressive, but I think the more general trade-off between certainty in one's security and parallelism is really interesting. Would love other similar papers if people know of them!

kkim801

How does a ring interconnect caues issues with partial failures or stalls? Wouldn't one bottleneck essentially cause a system shutdown?

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