I was just reading an article on CiM - Compute in-memory - architecture and how something called M3D memory architecture can overcome the memory walls associated with parallelism. The claim was that this setup consumes much less power than a classical SIMD type multi core chips, for the same amount of computation due to a large amount of SRAM memory available right next to the processor. Parts of such architecture and concepts I could not understand. Are we covering such concepts in this class?
I was just reading an article on CiM - Compute in-memory - architecture and how something called M3D memory architecture can overcome the memory walls associated with parallelism. The claim was that this setup consumes much less power than a classical SIMD type multi core chips, for the same amount of computation due to a large amount of SRAM memory available right next to the processor. Parts of such architecture and concepts I could not understand. Are we covering such concepts in this class?