This seems a lot like Halide where Spatial lets the designer focus more on the bigger design choices rather than get bogged down in the details with something like verilog. How close is the performance of Spatial compared to a design done in verilog (ignoring the difference in ease of design space exploration). Would it ever make sense to produce verilog from a Spatial design, then further optimize that verilog?

Spatial and other hardware accelerators give the programmer the responsibility of accessing the DRAM and SRAM memories, and therefore give the programmer the responsibility of specifying the memory hierarchy. This is very different than most languages used by software developers!

From lecture, some of the spatial programmer's responsibilities include specifying the algorithm as a hierarchy of controllers, the memory hierarchy of the algorithm, and explicit data movement. Some of the spatial systems responsibilities include the buffering of memories to maximize performance, hardware generation, and performance debugging feedback.

To add to this, some of the spatial programmer's responsibilities also include picking tiling factors, parallelism, and scheduling. Some of the spatial systems responsibilities also include minimizing resources.