Here it seems like we are implying that Verilog and Chisel have similar programming complexity. But I believe Kunle mentioned in lecture that Chisel compiles down to Verilog, so what's the advantage of using Chisel?

From some very quick Googling and my assumptions, could it be because Chisel is easier to code in than Verilog (along the same lines of why we'd want to code in C and not assembly)? On the wikipedia page for Chisel, it says that it supports object oriented and functional programming.

There's also SystemVerilog, which is the sort of the "next generation" of verilog, and has a lot of tools for formal verification.

This slide really helped put this whole lecture into good perspective for me and helped me really actually understand the benefits of using Spatial from a programmer's perspective. Programming C/C++ with pragmas is very restrictive in the sense that you're limited to what the C/C++ language supports and isn't very focused on providing custom parallelism specialization for the programmer, while Spatial does provide this. One question I had: is Spatial built upon C/C++ or is it its own language that's compiled directly into assembly code or something else?

@hamood I think this paper will be helpful. They say "Spatial generates optimized, synthesizable Chisel code along with C++ code which can be used on a host CPU to administrate initialization and execution of the accelerator on the target FPGA" https://ppl.stanford.edu/papers/pldi18_koeplinger.pdf

Had a chance to implement a rasterizer in HLS in another course. The sacrifice in performance and the difficulty to use makes total sense.